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150 ma, low quiescent current, cmos linear regulator data sheet adp121 rev. g information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2008C2012 analog devices, inc. all rights reserved. features input voltage range: 2.3 v to 5.5 v output voltage range: 1.2 v to 3.3 v output current: 150 ma low quiescent current i gnd = 11 a with 0 a load i gnd = 30 a with 150 ma load low shutdown current: <1 a low dropout voltage 90 mv @ 150 ma load high psrr 70 db @ 1 khz at v out = 1.2 v 70 db @ 10 khz at v out = 1.2 v low noise: 40 v rms at v out = 1.2 v no noise bypass capacitor required output voltage accuracy: 1% stable with a small 1 f ceramic output capacitor current limit and thermal overload protection logic controlled enable 5-lead tsot package 4-ball 0.4 mm pitch wlcsp applications mobile phones digital cameras and audio devices portable and battery-powered equipment post dc-to-dc regulation post regulation typical application circuits nc = no connect 1 2 3 5 4 06901-001 c out 1f c in 1f v out = 1.8v v in = 2.3v vout nc vin gnd en off on figure 1. adp121 tsot with fixed output voltage, 1.8 v vin vout en gnd 06901-002 c out 1f c in 1f v out = 1.8v v in = 2.3v off on figure 2. adp121 wlcsp with fixed output voltage, 1.8 v general description the adp121 is a quiescent current, low dropout, linear regulator that operates from 2.3 v to 5.5 v and provides up to 150 ma of output current. the low 135 mv dropout voltage at 150 ma load improves efficiency and allows operation over a wide input voltage range. the low 30 a of quiescent current at full load makes the adp121 ideal for battery-operated portable equipment. the adp121 is available in output voltages ranging from 1.2 v to 3.3 v. the parts are optimized for stable operation with small 1 f ceramic output capacitors. the adp121 delivers good transient performance with minimal board area. short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. the adp121 is available in a tiny 5-lead tsot and 4-ball 0.4 mm pitch halide-free wlcsp packages and utilizes the smallest footprint solution to meet a variety of portable applications.
adp121 data sheet rev. g | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 typical application circuits ............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 recommended specifications: input and output capacitors 4 absolute maximum ratings ............................................................ 5 thermal data ................................................................................ 5 thermal resistance ...................................................................... 5 esd caution .................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ..............................................7 theory of operation ...................................................................... 11 applications information .............................................................. 12 capacitor selection .................................................................... 12 undervoltage lockout ............................................................... 13 enable feature ............................................................................ 13 current limit and thermal overload protection ................. 14 thermal considerations ............................................................ 14 pcb layout considerations ...................................................... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 19 revision history 8/12rev. f to rev. g change to ordering guide ............................................................. 19 7/12rev. e to rev. f updated outline dimensions ........................................................ 18 change to ordering guide ............................................................. 19 8/11rev. d to rev. e changes to figure 22 ........................................................................ 9 changes to ordering guide .......................................................... 19 1/10rev. c to rev. d changes to ordering guide .......................................................... 19 11/09rev. b to rev. c changes to figure 1, figure 2, and general description section ................................................................................................ 1 changes to table 3 ............................................................................. 5 changes to figure 46 caption and figure 47 caption .............. 17 changes to ordering guide .......................................................... 19 9/09rev. a to rev. b updated outline dimensions ....................................................... 18 changes to ordering guide .......................................................... 19 3/09rev. 0 to rev. a changes to features and general description sections .............. 1 changes to input and output capacitor parameter ..................... 4 changes to figure 17 to figure 20 ................................................... 9 changes to figure 49 ...................................................................... 17 added figure 50 ............................................................................. 17 changes to ordering guide .......................................................... 19 7/08revision 0: initial version
data sheet adp121 rev. g | page 3 of 20 specifications v in = (v out + 0. 5 v) or 2.3 v, whichever is greater ; en = v in ; i out = 10 ma; c in = c out = 1 f; t a = 25c , unless otherwise noted. table 1 . parameter symbol conditions min typ max unit input voltage range v in t j = ?40c to +125c 2.3 5.5 v operating supply current i gnd i out = 0 a 11 a i out = 0 a, t j = ?40c to +125c 21 a i out = 10 ma 15 a i out = 10 ma, t j = ?40c to +125c 29 a i out = 150 ma 30 a i out = 150 ma, t j = ?40c to +12 5c 40 a shutdown current i gnd - sd en = gnd 0. 1 a en = gnd, t j = ?40c to +125c 1.5 a fixed output voltage accuracy v out i out = 10 ma ?1 +1 % 100 a < i out < 150 ma , v in = (v out + 0.5 v) to 5.5 v ?2 +2 % 100 a < i out < 150 ma , v in = (v out + 0. 5 v) to 5.5 v t j = ?40c to +125c ?3 +3 % regulation line regulation ?v out /?v in v in = (v out + 0. 5 v) to 5.5 v, i out = 1 ma t j = ?40c to +125c ? 0.0 3 +0. 03 %/v load regulation 1 ?v out /?i out i out = 1 ma to 150 ma 0.0 01 %/ma i out = 1 ma to 150 ma t j = ?40c to +125c 0.005 %/ma dropout voltage 2 v dropout v out = 3.3 v tsot i out = 10 ma 8 mv i out = 10 ma, t j = ?40c to +125c 12 mv i out = 150 ma 120 mv i out = 150 ma, t j = ?40c to +125c 180 mv wlcsp i out = 10 ma 6 mv i out = 10 ma, t j = ?40c to +125c 9 mv i out = 150 ma 90 mv i out = 150 ma, t j = ?40c to +125c 135 mv start - up time 3 t start - up v out = 3.3 v 120 s current - limit threshold 4 i limit 160 225 350 ma thermal shutdown th ermal shutdown threshold ts sd t j rising 150 c thermal shutdown hysteresis ts sd - hys 15 c en input en input logic high v ih 2.3 v v in 5.5 v 1.2 v en input logic low v il 2.3 v v in 5.5 v 0.4 v en input leakage current v i - leakage en = vin or gnd 0.05 a en = vin or gnd, t j = ?40c to +125c 1 undervoltage lockout uvlo input voltage rising uvlo rise 2.25 v input voltage falling uvlo fal l 1.5 v hysteresis uvlo hys 120 mv output noise out noise 10 hz to 100 khz, v in = 5 v, v out = 3.3 v 65 v rms 10 hz to 100 khz, v in = 5 v, v out = 2.5 v 52 v rms 10 hz to 100 khz, v in = 5 v, v out = 1.2 v 40 v rms
adp121 data sheet rev. g | page 4 of 20 parameter symbol conditions min typ max unit power supply rejection ratio psrr 10 khz, v in = 5 v, v out = 3.3 v 60 db 10 khz, v in = 5 v, v out = 2. 5 v 66 db 10 khz, v in = 5 v, v out = 1.2 v 70 db 1 based on an end - point calculation using 1 ma and 10 0 ma loads. see figure 6 for typical load re gulation performance for loads less than 1 ma. 2 dropout voltage is defined as the input - to - output voltage differential when the input voltage is set to the nominal output voltage. this applies only for output voltages above 2.3 v. 3 start - up time is defined as the time between the rising edge of en to vout being at 90 % of its nominal value. 4 current - limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. for exampl e, the current limit for a 3 . 0 v output voltage is defined as the current that ca uses the output voltage to drop to 90% of 3.0 v, or 2.7 v. recommended specific ations: input and ou tput capacitors table 2 . parameter symbol conditions min typ max unit input and output capacitor 1 minimum input and output c apacitance c min t a = ?40c to +125c 0.70 f capacitor esr r esr t a = ?40c to +125c 0.001 1 1 the minimum input and output capacitance should be greater than 0.70 f over the full range of operating conditions. the full range of operating conditions in the application must be considered d uring device selection to ensure that the minimum capacitance specification is met. x7r and x5r type capacitors are recommend ed; y5v and z5u capacitors are not recommended for use with any ldo.
data sheet adp121 rev. g | page 5 of 20 absolute maximum rat ings table 3 . parameter rating v in to gnd ? 0. 3 v to +6 .5 v v out to gnd ? 0. 3 v to v in en to gnd ? 0. 3 v t o +6 .5 v storage temperature range ? 65c to +150c operating junction temperature range ? 40c to +125c soldering conditions jedec j - std -020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect de vice reliability. t hermal d ata absolute maximum ratings apply individually only, not in combination. the adp121 can be damaged when the junction temperature limits are exceeded. monitoring the ambient temperature does not guarantee that the junction temper ature (t j ) is within the specified temperature limits. in applications with high power dissipation and po or thermal resistance , the maximum ambient temperature may have to be derated. in applications with moderate power dissipation and low pcb thermal res is tance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. t j of the device is dependent on the ambient temperature (t a ), the power dissipation of the device (p d ), and the junc tion - to - ambient thermal resistance of the package ( ja ). t j is calculated from t a and p d using the following formula: t j = t a + ( p d ja ) junction - to - ambient thermal resistance , ja , is based on modeling and calculation using a four - layer board. the junc tion - to - ambient thermal resistance is highly dependent on the application and board layout. in applications where high maximum power dissipation exists, close attention to thermal board design is required. the value of ja may vary, depending on pcb mate rial, layout, and env ironmental conditions. the specified values of ja are based on a 4- layer, 4 3 , circuit board. refer to jesd 51 - 7 and jesd 51 - 9 for detailed information on the board construction. for additional information, see an - 617 application note , microcsp tm wafer level chip scale package . jb is the junction - to - board thermal characterization parameter measured in c / w. jb is based on mo deling and calculation using a four - layer board. the jesd51 - 12 guidelines for reporting and using package thermal information states that thermal characterization parameters are not the same as thermal resistances. jb measures the component power flowing through multiple thermal paths rather than a single path as in thermal resistance, jb . therefore, jb the rmal paths include convection from the top of the package as well as radiation from the package, factors that make jb more useful in real - world applications. maximum t j is calculated from the board temperature (t b ) and p d using the following formula: t j = t b + ( p d jb ) r efer to jesd51 -8 and jesd51 - 12 for more detailed information about jb . thermal resistance ja a nd jb are specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 4 . thermal resistance package type ja jb unit 5- lead tsot 170 43 c/w 4- ball 0.4 mm pitch wlcsp 260 58 c/w esd caution
adp121 data sheet rev. g | page 6 of 20 pin configuration s and function descrip tions nc = no connect top view (not to scale) 1 2 3 5 4 06901-003 vin gnd en vout nc 1 2 a b top view (not to scale) 06901-004 vin vout en gnd figure 3. 5 - lead tsot pin config uration figure 4. 4 -b all wlcsp pin configuration table 5 . pin function descriptions pin no. mnemonic description tsot wlcsp 1 a1 v in regulator input supply. bypass v in to gnd with a 1 f or larger capac itor. 2 b2 gnd ground. 3 b1 en enable input. drive en high to turn on the regulator; drive en low to turn off the regulator. for automatic startup, connect en to v in. 4 n/a nc no connect. not connected internally. 5 a2 v out regulated output voltage. by pass v out to gnd with a 1 f or greater capacitor.
data sheet adp121 rev. g | page 7 of 20 typical performance characteristics v in = 2.3 v , v out = 1.8 v, i out = 10 ma , c in = c out = 1 f , t a = 25c, unless otherwise noted . 1.804 1.802 1.800 1.798 1.796 1.794 1.792 1.790 1.788 1.786 v out (v) ?40c ?5c 25c 85c 125c t j (c) 06901-005 v out = 1.8v v in = 2.3v i load = 10a i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 150ma figure 5. output voltage vs. junction te mperature 1.806 1.804 1.802 1.800 1.798 1.796 1.794 0.001 0.01 0.1 1 10 100 1000 i load (ma) v out (v) 06901-006 v out = 1.8v v in = 2.3v t a = 25c figure 6. output voltage vs. load current 1.806 1.804 1.802 1.800 1.798 1.796 1.794 v out (v) 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 v in (v) 06901-007 i load = 10a i load = 100a i load = 1ma i load = 10ma i load = 50ma i load = 100ma v out = 1.8v t a = 25c figure 7. output voltage vs. input voltage 40 35 30 25 20 15 10 5 0 ground current (a) ?40c ?5c 25c 85c 125c t j (c) 06901-008 v out = 1.8v v in = 2.3v i load = 10a i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 150ma figure 8. ground current vs. junction temperature 35 30 25 20 15 10 5 0 0.001 0.01 0.1 1 10 100 1000 i load (ma) ground current (a) 06901-009 v out = 1.8v v in = 2.3v t a = 25c figure 9. ground current vs. load current 35 30 25 20 15 10 5 0 2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 v in (v) ground current (a) 06901-010 v out = 1.8v t a = 25c i load = 10a i load = 100a i load = 1ma i load = 10ma i load = 100ma i load = 150ma figure 10 . ground current vs. input voltage
adp121 data sheet rev. g | page 8 of 20 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 ?50 ?25 0 25 50 75 100 125 temperature (c) shutdown current (a) 06901-011 v in = 2.30 v in = 2.50 v in = 3.00 v in = 3.50 v in = 4.20 v in = 5.50 figure 11 . shutdown current vs. temperature at various input voltages 120 140 160 180 100 80 60 40 20 0 1 10 100 1000 i load (ma) v dropout (mv) 06901-018 t a = 25c v out = 3.3v v out = 2.5v figure 12 . dropout voltage vs. load curren t, tsot 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60 v in (v) v out (v) 06901-019 v out = 3.3v t a = 25c v out @ 1ma v out @ 10ma v out @ 20ma v out @ 50ma v out @ 100ma v out @ 150ma figure 13 . output voltage vs. input voltage (in dropout) , tsot 100 80 60 40 140 120 20 0 1 10 100 1000 i load (ma) v dropout (mv) 06901-012 t a = 25c v out = 3.3v v out = 2.5v figure 14 . dropout voltage vs. load current, wlcsp 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.20 3.25 3.30 3.35 3. 40 3.45 3.50 3.55 3.60 v in (v) v out (v) 06901-013 v out = 3.3v t a = 25c v out @ 1ma v out @ 10ma v out @ 20ma v out @ 50ma v out @ 100ma v out @ 150ma figure 15 . o utput voltage vs. input voltage ( in dropout), wlcsp 60 50 40 30 20 10 0 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60 v in (v) ground current (a) 06901-020 v out = 3.3v t a = 25c i load = 1ma i load = 10ma i load = 20ma i load = 50ma i load = 100ma i load = 150ma figure 16 . gr o und current vs. input voltage (in dropout)
data sheet adp121 rev. g | page 9 of 20 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) 06901-014 v ripple = 50mv v in = 5v v out = 1.2v c out = 1f 150ma 100ma 10ma 1ma 100a 0a figure 17 . power supply rejection ratio vs. frequency 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) 06901-015 v ripple = 50mv v in = 5v v out = 1.8v c out = 1f 150ma 100ma 10ma 1ma 100a 0a figure 18 . power supply rejection ratio vs. frequency 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) 06901-016 v ripple = 50mv v in = 5v v out = 3.3v c out = 1f 150ma 100ma 10ma 1ma 100a 0a figure 19 . power supply rejection ratio vs. frequenc y 0 ?20 ?40 ?60 ?80 ?100 ?120 10 100 1k 10k 100k 1m 10m frequency (hz) psrr (db) 06901-017 3.3v/150ma 3.3v/100a 1.2v/150ma 1.2v/100a 1.8v/150ma 1.8v/100a figure 20 . power supply rejection ratio vs. frequency at various output v oltages and load curren ts 10 1 0.1 0 10 100 1k 10k 100k frequency (hz) noise (v/hz) 06901-021 1.2v 1.8v 3.3v figure 21 . output noise spectrum, v in = 5 v, i load = 10 ma, c out = 1 f 70 60 50 40 30 20 10 0 0.001 0.01 0.1 1 10 100 1000 i load (ma) out noise (v rms) 06901-022 3.3v 2.5v 1.8v 1.5v 1.2v figure 22 . output noise vs . load current and output voltage , v in = 5 v, c out = 1 f
adp121 data sheet rev. g | page 10 of 20 06901-024 (40s/div) (150ma/div) (50mv/div) i load v out v in = 5v v out = 1.8v 1ma to 150ma load step, 2.5a/s figure 23 . load transient response, c in = c out = 1 f 06901-025 (40s/div) (150ma/div) (50mv/div) i load v out v in = 5v v out = 1.8v 1ma to 150ma load step, 2.5a/s figure 24 . load transient response, c in = c out = 4.7 f 06901-037 (4s/div) (1v/div) (10mv/div) v in v out v out = 1.8v, c in = c out = 1f 4v to 5v input voltage step, 2v/s figure 25 . line transient response, load current = 150 ma 06901-038 (10s/div) (1v/div) (10mv/div) v in v out v out = 1.8v, c in = c out = 1f 4v to 5v input voltage step, 2v/s figure 26 . line transient response, load current = 1 ma
data sheet adp121 rev. g | page 11 of 20 theory of operation the adp121 is a low quiescent current, low dropout linear regulator that operate s from 2.3 v to 5.5 v and provide s up to 150 ma of output current. drawing a low 30 a quiescent current ( typical) at full load make s the adp121 ideal for battery - operated portable equipment. shutdown current consumption is typically 100 na. optimized for use with small 1 f ceramic capacitors, the adp121 provide s excellent transient performance. 0.8v reference short circuit, uvlo, and thermal protect shutdown r1 r2 vout vin gnd en 06901-023 figure 27 . internal block diagram internally, the adp121 consist s of a reference, an error amplifier , a feedback voltage divider , and a pmos pass transistor. output current is delivered via the pmos pass device , which is con - trolled by th e error amplifier. the error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the pmos device is pulled lower, allowing more current to flow an d increasing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing le ss current to flow and decreasing the output voltage. the adp121 is available in output voltage s ranging from 1.2 v to 3. 3 v . the adp121 use s the en pin to enable and disable the v out p in under normal operating conditions. when en is high, v out turns on ; when en is low, v out turns off. for automatic startup, en can be tied to v in .
adp121 data sheet rev. g | page 12 of 20 applications information capacitor selection output capacitor the adp121 is designed for operation with small, space - saving ceramic capacitors , but function s with most commonly used capacitors as long as care is taken with the effective series resistance ( esr ) value. the esr of the output capaci tor affects stabi lity of the ldo control loop . a minimum of 0.70 f capacitance with an esr of 1 ? or less is recommended to ensure stability of the adp121 . t he transient response to changes in the load current is also a ffected by output capacitance . using a larger value of output capacitance improve s the transient response of the adp121 to large changes in the load current. figure 28 and figure 29 show the tr ansient responses for o utput capacitance values of 1 f and 4.7 f , respectively . 06901-039 ch1 mean 115.7ma (400ns/div) (150ma/div) (50mv/div) i load v out v out = 1.8v, c in = c out = 1f 1ma to 150ma load step, 2.5a/s figure 28 . output transient response, c out = 1 f 06901-040 (400ns/div) (150ma/div) (50mv/div) i load v out v out = 1.8v, c in = c out = 4.7f 1ma to 150ma load step, 2.5a/s figure 29 . output transient response, c out = 4.7 f input bypass ca pacitor connecting a 1 f capacitor from v in to gnd reduces the circuit sensitivity to the pcb layout, especially when long input traces or high source impedance is encountered. if output capacitance greater than 1 f is required, the input capacitor shoul d be increased to match it . input and output capacitor properties any good quality ceramic capacitor can be used with the adp121 , as long as it meet s the minimum capacitance and maximum esr requirements. ceramic capacitors are manufac - tured with a variety of dielectrics, each with a different behavior over temperature and applied voltage. c apa citors must have a n adequate dielectric to ensure the minimum capacitance over the necessary temperature range and dc bias conditions . x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recomm ended . y5v and z5u dielectrics are not recommended , due to their poor temperature and dc bias characteristics. figure 30 depicts the capacitance vs . voltage bias characteristic of an 0402 1 f, 1 0 v, x5r capacitor. the voltage stability of a capacitor is strongly influenced by the capacitor size and voltage rating. in general, a capacitor in a larger package or higher voltage rating exhibit s better stability. the temperature variation o f the x5r dielectric is about 15% over the ? 40c to + 85 c tempera - ture range and is not a function of package or voltage rating. 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 voltage (v) capacitance (f) 06901-036 figure 30 . capacitance vs . voltage bias characteristic
data sheet adp121 rev. g | page 13 of 20 equation 1 can be used to determine the worst - case capacitance a ccounting for capacitor variation over temperature, compo - nent tolerance, and voltage. c eff = c bias (1 ? tempco ) (1 ? tol ) (1) where: c bias is the effective capacitance at the operating voltage. tempco is the worst - case capacitor temperature coefficien t. tol is the worst - case component tolerance. in this example, tempco over ?40 c to +85 c is assumed to be 15% for an x5r dielectric. tol is assumed to be 10%, and c bias is 0.94 f at 1.8 v from the graph in figure 30 . substitutin g these values in equation 1 yields c eff = 0.94 f (1 ? 0.15) (1 ? 0.1) = 0.719 f therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the ldo over temperature and tolerance at the chosen output voltage. to guar antee the performance of the adp12 1 , it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors are evaluated for each application. undervoltage l ockout the adp121 ha s an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage is less than approximately 2.2 v. this ensures that the inputs of the adp121 and the output behave in a predictable manner during power - up. enable feature the adp121 use s the en pin to enable and disable the v out pin under normal operating conditions. figure 31 shows a rising voltage on en crossing the active threshold, and then v out turns on. when a falling voltage on en crosses the inactive threshold, v out turns off. 06901-026 40ms/div 500mv/div en v in = 5v v out = 1.8v c in = c out = 1f i load = 100ma vout figure 31 . adp121 typical en pin operation as shown in figure 31 , the en pin has built in hysteresis. this prevents on/off oscillations that may occur due to noise on the en pin as it passes through th e threshold points. the active/inactive thresholds of the en pin are derived from the vin voltage. therefore, these thresholds vary with changing inpu t voltage. figure 32 shows typical en active/inactive thresholds when the inp ut voltage varies from 2.3 v to 5.5 v. 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0.70 typical en thresholds (v) 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 v in (v) en active en inactive 06901-027 figure 32 . typical en pin thresholds vs. input voltage the adp121 utilize s an internal soft start to limit the inrush current when the output is enabled. the start - up time for the 1.8 v opti on is approximately 120 s from the time the en active threshold is crossed to when the output reaches 90% of its final value. the start - up time is somewhat dependant on the output voltage setting and increases slightly as the output voltage increases. 6 5 4 3 2 1 0 0 20 40 60 80 100 120 140 160 180 200 time (s) volts (v) 06901-041 1.2v 1.8v 3.3v en f igure 33 . typical start- up time
adp121 data sheet rev. g | page 14 of 20 c urrent l imit and t hermal overload protection the adp121 is protected against damage due to excessive power dissipation by current and thermal overload protection circuits . the adp121 is designed to current limit when the output load reaches 225 ma (typical). when the output load exceeds 225 ma , the output voltage is reduced to maintain a constant current limit. thermal overload protection is built - in , which limit s the junction temperature to a maxim um of 150c (typical) . under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above 150c, the output is turned off , reduc ing the output current to zero . when the junction temperatur e drops below 135c, t he output is turned on again and output current is restored to its nominal value . consider the case where a hard short from v out to gnd occurs . at first , the adp121 current limit s , so that only 225 ma is con - ducted into the short. if sel f- heating of the junction is great enough to cause its temperature to rise above 150c , thermal shutdown activ ate s turning off the output and reducing the output current to zero. as the junction temperature cools and drops below 135c, the output turn s on and conduct s 225 ma into the short, again caus ing the junction temperature to rise above 150c . this thermal oscillation between 135c and 150c cause s a current oscillation between 225 ma and 0 ma that continue s as long as the short remains at the outp ut. current and thermal limit protections are intended to protect the device against accidenta l overload conditions. for reliable operation, device power dissipation must be externally limited so junction temperatures do not exceed 125c. thermal considera tions i n most applications, the adp121 do es not dissipate a lot of heat due to high efficiency. however, in applications with a high ambient temperature and high supply voltage to an output voltage differential, the heat dissipated in the package is large enough that it can cause the junction temperature of the die to exceed the maximum junction temperature of 125c. when the junction temperature exceeds 150c, the converter enters thermal shutdown. it recovers only after the junction temper ature has decre ased below 135c to prevent any permanent damage. therefore, thermal analysis for the chosen application is very important to guarantee reliable performance over all conditions. the junction temperature of the die is the sum of the ambient temperature of the environment and the tempera - ture rise of the package due to the power dissipation, as shown in equation 2 . to guarantee reliable operation, the junction temperature of the adp121 must not exceed 125c. to e nsure that the junction temperature stays bel ow this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. thes e parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction - and - ambient air ( ja ). the ja number is dependent on the package assembly compounds used and the amount of copper to which the gnd pins of the package are soldered on the pcb . table 6 shows typical ja values for various pcb copper sizes and table 7 shows the typical jb value s for the adp121 . table 6 . typical ja values copper size (mm 2 ) tsot ( c/w) wlcsp (c/w) 0 1 170 260 50 152 159 100 146 157 300 134 153 500 131 151 1 device soldered to minimum size pin traces. table 7 . typical jb values tsot ( c/w) wlcsp (c/w) 42.8 58.4 the junction temperature of the adp121 can be calculated from the following equation: t j = t a + ( p d ja ) (2) w here : t a is the ambient te mperature. p d is the power dissipation in the die, given by p d = [( v in ? v out ) i load ] + ( v in i gnd ) (3) where : i load is the load current. i gnd is the ground current . v in and v out are input and output voltages, respectively. power dissipation due to grou nd current is quite small and can be ignored. therefore , the junction temperature equation simplifies to t j = t a + {[( v in ? v out ) i load ] ja } (4) as shown in equation 4, for a given ambient temperature, input - to - output voltage differenti al , and contin uous load current, there exists a minimum copper size requirement for the pcb to ensure that the junction temperature does not rise above 125c. figure 34 to figure 47 show junction temperature calcul ations for different ambient temperatures, load currents, v in - to -v out d ifferential s, and areas of pcb copper. in cases where the board temperature is known, the thermal characterization parameter, jb , can be used to estimate the junction temperature rise. t j is calculated from t b and p d using the formula t j = t b + ( p d jb ) (5)
data sheet adp121 rev. g | page 15 of 20 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3. 5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-028 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 34 . tsot, 5 00 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-029 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 35 . tsot, 1 00 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-030 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 36 . tsot, 0 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-031 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 37 . tsot, 50 0 mm 2 of pcb copper, t a = 50 c 140 120 100 80 60 40 20 0 0.5 1.0 1. 5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-032 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 38 . tsot, 1 00 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-033 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 39 . tsot, 0 mm 2 of pcb copper, t a = 50c
adp121 data sheet rev. g | page 16 of 20 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-042 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 40 . wlcsp, 500 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-043 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 41 . wlcsp, 100 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-044 max junction temperature i load = 1ma i load = 10ma i load = 25ma i load = 100ma i load = 150ma i load = 50ma i load = 75ma figure 42 . wlcsp, 0 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-045 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 43 . wlcsp, 500 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-046 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 44 . wlcsp, 100 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-047 i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma max junction temperature figure 45 . wlcsp, 0 mm 2 of pcb copper, t a = 50c
data sheet adp121 rev. g | page 17 of 20 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-048 max junction temperature i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma figure 46 . tsot, 100 mm 2 of pcb copper, board t emperature = 85c 140 120 100 80 60 40 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v in ? v out (v) junction temperature, t j (c) 06901-049 max junction temperature i load = 1ma i load = 10ma i load = 25ma i load = 50ma i load = 75ma i load = 100ma i load = 150ma figure 47 . wlcsp, 100 mm 2 of pcb copper, board t emperature = 85c pcb lay out considerations heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the adp121 . however, as can be seen from table 6 and table 7 , a point of diminishing returns is eventually reached, beyond which an increas e in the co pper size does not yield significant heat dissipation benefits . place t he input capacitor as close as possible to the v in and gnd pins. place the output capacitor as close as pos sible to the v out and gnd pins . use 0402 or 0603 size capacitors and resistors to achieve the smallest possible footprint solution on boards where area is limited . vin vout gnd en gnd gnd gnd 06901-034 c2 c1 u1 j1 anal og d ev ices adp 12 1-xx- eva lz figure 48 . example of tsot pcb layout 06901-050 figure 49 . example of wlcsp pcb layout top side 06901-051 figure 50 . example of wlcsp pcb layout bottom side
adp121 data sheet rev. | page 18 of 20 outline dimensions 100708-a * compliant to jedec standards mo-193-ab with the exception of package height and thickness. 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.20 0.08 0.60 0.45 0.30 8 4 0 0.50 0.30 0.10 max * 1.00 max * 0.90 max 0.70 min 2.90 bsc 5 4 1 2 3 sea ting plane figure 51 . 5 - lead thin small outline transistor package [tsot] (uj- 5) dimensions show in millimeters 0.860 0.820 sq 0.780 bot t om view (bal l side up) top view (bal l side down) a 12 b bal l a1 identifier 0.40 ref 0.660 0.600 0.540 end view 0.280 0.260 0.240 0.381 0.356 0.331 sea ting plane 0.230 0.200 0.170 coplanarity 0.05 07-10-2012- a figure 52 . 4- ball wafer level chip scale - package [wlcsp] (cb -4- 2) dimensions show in millimeters
data sheet adp121 rev. g | page 19 of 20 ordering guide model 1 temperature range output voltage (v) 2 package description package option 3 branding adp121-aujz12r7 ?40c to +125c 1.2 5-lead tsot uj-5 lc0 adp121-aujz15r7 ?40c to +125c 1.5 5-lead tsot uj-5 lc1 adp121-aujz18r7 ?40c to +125c 1.8 5-lead tsot uj-5 lc7 adp121-aujz20r7 ?40c to +125c 2.0 5-lead tsot uj-5 lc9 adp121-aujz25r7 ?40c to +125c 2.5 5-lead tsot uj-5 lca adp121-aujz28r7 ?40c to +125c 2.8 5-lead tsot uj-5 la3 adp121-aujz30r7 ?40c to +125c 3.0 5-lead tsot uj-5 la4 adp121-aujz33r7 ?40c to +125c 3.3 5-lead tsot uj-5 la5 adp121-acbz12r7 ?40c to +125c 1.2 4-ball wlcsp cb-4-2 lc0 adp121-acbz15r7 ?40c to +125c 1.5 4-ball wlcsp cb-4-2 lc1 adp121-acbz165r7 ?40c to +125c 1.65 4-ball wlcsp cb-4-2 lc4 adp121-acbz18r7 ?40c to +125c 1.8 4-ball wlcsp cb-4-2 lc7 adp121-acbz188r7 ?40c to +125c 1.875 4-ball wlcsp cb-4-2 lc8 adp121-acbz20r7 ?40c to +125c 2.0 4-ball wlcsp cb-4-2 lc9 adp121-acbz25r7 ?40c to +125c 2.5 4-ball wlcsp cb-4-2 lca adp121-acbz28r7 ?40c to +125c 2.8 4-ball wlcsp cb-4-2 lcd adp121-acbz30r7 ?40c to +125c 3.0 4-ball wlcsp cb-4-2 lcf adp121-acbz33r7 ?40c to +125c 3.3 4-ball wlcsp cb-4-2 lcg adp121cb-1.2-evalz 1.2 adp121 1.2 v output evaluation board adp121cb-1.5-evalz 1.5 adp121 1.5 v output evaluation board adp121cb-1.8-evalz 1.8 adp121-1 1.8 v output evaluation board adp121cb-2.0-evalz 2.0 adp121-1 2.0 v output evaluation board adp121cb-2.5-evalz 2.5 adp121-1 2.5 v output evaluation board adp121cb-2.8-evalz 2.8 adp121-1 2.8 v output evaluation board adp121cb-3.0-evalz 3.0 adp121-1 3.0 v output evaluation board adp121cb-3.3-evalz 3.3 adp121-1 3.3 v output evaluation board adp121ujz-redykit evaluation board kit 1 z = rohs compliant part. 2 for additional voltage options, contact your local analog devices, inc., sales or distribution representative. 3 the wlcsp package option is halide free.
adp121 data sheet rev. g | page 20 of 20 notes ?2008C2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06901-0-8/12(g)

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